[nano501] nano 501 Tutorial, March 19, 2:30 pm

[Goodman, Alicia D.]

Exploring CMOS-Nano Hybrid Technology in Three Dimensions

Wei Wang, University of Albany

2:30 pm in EE 317

The CMOS-nano hybrid technology tries to utilize the advantages of both 
traditional CMOS and novel nanowire/nanotube structures, which will 
enhance IC performances in the near future and create breakthroughs in 
the long run. The CMOS-nano hybrid IC can be efficiently fabricated 
using the 3D integration approach. This talk will present the recent 
progress in designing and building such 3D hybrid ICs for FPGA and 
neuromorphic network applications.

Bio:

Wei Wang received his Ph. D degree from Concordia University, Montreal, 
QC, Canada (Electrical and Computer Engineering) in 2002.  From 2002 to 
2004, he was an Assistant professor in the Department of Electrical and 
Computer Engineering, the University of Western Ontario, London, ON, 
Canada.  From 2005 to 2007, he was an assistant professor in the 
Department of Electrical and Computer Engineering, Purdue University 
Indianapolis. In December 2007, he joined CNSE of UAlbany as a senior 
research scientist and assistant professor. His main research interests 
are nanoelectronics, CMOS-nano hybrid circuit, 3D IC, ASIC and FPGA 
design. His is the inventor of 3D CMOL, nFPGA and rFPGA. He has over 90 
journal and conference papers and three US patents.  He received New 
Opportunities Fund Award from Canadian Foundation of Innovation in 2004, 
IUPUI Research Initiative Award and CCECE Best Paper Award in 2005.

-- 

Alicia Goodman
Administrative Assistant
Network for Computational Nanotechnology
Purdue University
Birck Nanotechnology Center
1205 West State Street
West Lafayette, IN  47907
Phone:  765-494-7715
Fax:  765-494-0811
email:  goodman at purdue.edu
website:  www.nanoHUB.org

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